CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies: Process-Aware SRAM Design and Test (Frontiers in Electronic Testing, #40)

by Andrei Pavlov and Manoj Sachdev

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The monograph will be dedicated to SRAM (memory) design and test issues in nano-scaled technologies by adapting the cell design and chip design considerations to the growing process variations with associated test issues. Purpose: provide process-aware solutions for SRAM design and test challenges.

  • ISBN13 9789048178551
  • Publish Date 28 October 2010 (first published 1 January 2008)
  • Publish Status Active
  • Publish Country NL
  • Imprint Springer
  • Edition Softcover reprint of hardcover 1st ed. 2008
  • Format Paperback
  • Pages 194
  • Language English