Yogesh Singh Chauhan is a professor at Indian Institute of Technology Kanpur, India. He was with Semiconductor Research & Development Center at IBM Bangalore during 2007 – 2010; Tokyo Institute of Technology in 2010; University of California Berkeley during 2010-2012; and ST Microelectronics during 2003-2004. He is the developer of several industry standard SPICE models: ASM-GaN-HEMT model, BSIM-BULK (formerly BSIM6), BSIM-CMG, BSIM-IMG, BSIM4 and BSIM-SOI models. His research interests are characterization, modeling, and simulation of semiconductor devices and RF circuit design.
He is the Fellow of IEEE, Editor of IEEE Transactions on Electron Devices and Distinguished Lecturer of the IEEE Electron Devices Society. He has served in the technical program committees of IEDM, SISPAD, ESSDERC, EDTM, and VLSI Design conferences. He has published more than 250 papers in international journals and conferences.
