Frontiers in Electronic Testing

1 total work

Power-Constrained Testing of VLSI Circuits

by Nicola Nicolici and Bashir M. Al-Hashimi

Published 28 February 2003

This text focuses on techniques for minimizing power dissipation during test application at logic and register-transfer levels of abstraction of the VLSI design flow. It surveys existing techniques and presents several test automation techniques for reducing power in scan-based sequential circuits and BIST data paths.