Book 115

This book focuses on the architecture and circuit design for cognitive radio receiver front-ends. The authors first provide a holistic explanation of RF circuits for cognitive radio systems. This is followed by an in-depth exploration of existing techniques that can be utilized by circuit designers. Coverage also includes novel circuit techniques and architectures that can be invaluable for designers for cognitive radio systems.

This book describes design techniques that can be used to mitigate crosstalk in high-speed I/O circuits. The focus of the book is in developing compact and low power integrated circuits for crosstalk cancellation, inter-symbol interference (ISI) mitigation and improved bit error rates (BER) at higher speeds. This book is one of the first to discuss in detail the problem of crosstalk and ISI mitigation encountered as data rates have continued beyond 10Gb/s. Readers will learn to avoid the data performance cliff, with circuits and design techniques described for novel, low power crosstalk cancellation methods that are easily combined with current ISI mitigation architectures.

This book describes novel and disruptive architecture and circuit design techniques, toward the realization of low-power, standard-compliant radio architectures and silicon implementation of the circuits required for a variety of leading-edge applications. Readers will gain an understanding of the circuit level challenges that exist for low power radios, compatible with the IEEE 802.15.6 standard. The authors discuss current techniques to address some of these challenges, helping readers to understand the state-of-the-art, and to address the various, open research problems that exist with respect to realizing low power radios.

  • Enables readers to face challenging bottleneck in low power radio design, with state-of-the-art, circuit-level design techniques;
  • Provides readers with basic knowledge of circuits suitable for low power radio circuits compatible with the IEEE 802.15.6 standard;
  • Discusses new and emerging architectures and circuit techniques, enabling applications such as body area networks and internet of things.


This book describes intuitive analog design approaches using digital inverters, providing filter architectures and circuit techniques enabling high performance analog circuit design. The authors provide process, supply voltage and temperature (PVT) variation-tolerant design techniques for inverter based circuits. They also discuss various analog design techniques for lower technology nodes and lower power supply, which can be used for designing high performance systems-on-chip.


This book describes design techniques for wideband quadrature LO generation for software defined radio transceivers, with frequencies spanning 4GHz to around 80GHz. The authors discuss several techniques that can be used to reduce the cost and/or power consumption of one of the key component of the RF front-end, the quadrature local oscillator. The discussion includes simple and useful insights into quadrature VCOs, along with numerous examples of practical techniques.