The Springer International Series in Engineering and Computer Science

21 primary works

Low-Noise Wide-Band Amplifiers in Bipolar and CMOS Technologies

by Zhong Yuan Chong and Willy M.C. Sansen

Published 30 November 1990

Analog circuit design has grown in importance because so many circuits cannot be realized with digital techniques. Examples are receiver front-ends, particle detector circuits, etc. Actually, all circuits which require high precision, high speed and low power consumption need analog solutions. High precision also needs low noise. Much has been written already on low noise design and optimization for low noise. Very little is available however if the source is not resistive but capacitive or inductive as is the case with antennas or semiconductor detectors. This book provides design techniques for these types of optimization. This book is thus intended firstly for engineers on senior or graduate level who have already designed their first operational amplifiers and want to go further. It is especially for engineers who do not want just a circuit but the best circuit. Design techniques are given that lead to the best performance within a certain technology. Moreover, this is done for all important technologies such as bipolar, CMOS and BiCMOS. Secondly, this book is intended for engineers who want to understand what they are doing. The design techniques are intended to provide insight. In this way, the design techniques can easily be extended to other circuits as well. Also, the design techniques form a first step towards design automation. Thirdly, this book is intended for analog design engineers who want to become familiar with both bipolar and CMOS technologies and who want to learn more about which transistor to choose in BiCMOS.

Symbolic Analysis for Automated Design of Analog Integrated Circuits

by Georges Gielen and Willy M.C. Sansen

Published 31 May 1991

It is a great honor to provide a few words of introduction for Dr. Georges Gielen's and Prof. Willy Sansen's book "Symbolic analysis for automated design of analog integrated circuits". The symbolic analysis method presented in this book represents a significant step forward in the area of analog circuit design. As demonstrated in this book, symbolic analysis opens up new possibilities for the development of computer-aided design (CAD) tools that can analyze an analog circuit topology and automatically size the components for a given set of specifications. Symbolic analysis even has the potential to improve the training of young analog circuit designers and to guide more experienced designers through second-order phenomena such as distortion. This book can also serve as an excellent reference for researchers in the analog circuit design area and creators of CAD tools, as it provides a comprehensive overview and comparison of various approaches for analog circuit design automation and an extensive bibliography. The world is essentially analog in nature, hence most electronic systems involve both analog and digital circuitry. As the number of transistors that can be integrated on a single integrated circuit (IC) substrate steadily increases over time, an ever increasing number of systems will be implemented with one, or a few, very complex ICs because of their lower production costs.

High-Performance CMOS Continuous-Time Filters

by Jose Silva-martinez, Michiel Steyaert, and Willy M.C. Sansen

Published 31 May 1993

High-Performance CMOS Continuous-Time Filters is devoted to the design of CMOS continuous-time filters. CMOS is employed because the most complex integrated circuits have been realized with this technology for two decades. The most important advantages and drawbacks of continuous-time filters are clearly shown. The transfer function is one of the most important filter parameters but several others (like intermodulation distortion, power-supply rejection ratio, noise level and dynamic range) are fundamental in the design of high-performance systems. Special attention is paid to the practical aspects of the design, which shows the difference between an academic design and an industrial design. A clear understanding of the behavior of the circuits and techniques is preferred over complex equations or interpretation of simulated results. Step-by-step design procedures are very often used to clarify the use of the techniques and topologies.
The organization of this text is hierarchical, starting with the design consideration of the basic building blocks and ending with the design of several high-performance continuous-time filters. Most of the circuits have been fabricated, theoretically analyzed and simulated, and silicon measurement results are compared with each other.
High-Performance CMOS Continuous-Time Filters can be used as a text book for senior or graduate courses on this topic and can also be useful for industrial engineers as a reference book.

Analog Interfaces for Digital Signal Processing Systems

by Frank op 't Eynde and Willy M.C. Sansen

Published 30 June 1993

It is a great honor to provide an introduction for Dr. Frank Op 't Eynde's and Dr. Willy Sansen's book "Analog Interfaces for Digital Signal Processing Systems". The field of analog integrated circuit design is undergoing rapid evolution. The pervasiveness of digital processing has considerably modified the micro-system architectures: the analog part of complex mixed systems is more and more pushed at the boundary limits of the processing chain. Moreover, the increased performance of digital circuits, in terms of accuracy and speed, are making the specification requirements of analog circuits very strict. In addition to this, the technology, supply voltage and power consumption of analog circuits must be compatible with those, typical for digital circuits. Therefore, in a few words, analog circuits are becoming complex and specialised interfaces between the real world and digital signal processing domains. This technological evolution should be accompanied by an equivalently fast evolution in designer competencies. Knowledge of complicated signal handling should be quickly replaced by know-how of simple but very accurate and very fast signal processing and a solid background in data conversion techniques. All of this through the use of the CMOS (and possibly BiCMOS) technology.

Analog VLSI Integration of Massive Parallel Signal Processing Systems

by Peter Kinget and Michiel Steyaert

Published 30 November 1996

When comparing conventional computing architectures to the architectures of biological neural systems, we find several striking differences. Conventional computers use a low number of high performance computing elements that are programmed with algorithms to perform tasks in a time sequenced way; they are very successful in administrative applications, in scientific simulations, and in certain signal processing applications. However, the biological systems still significantly outperform conventional computers in perception tasks, sensory data processing and motory control. Biological systems use a completely dif­ ferent computing paradigm: a massive network of simple processors that are (adaptively) interconnected and operate in parallel. Exactly this massively parallel processing seems the key aspect to their success. On the other hand the development of VLSI technologies provide us with technological means to implement very complicated systems on a silicon die. Especially analog VLSI circuits in standard digital technologies open the way for the implement at ion of massively parallel analog signal processing systems for sensory signal processing applications and for perception tasks. In chapter 1 the motivations behind the emergence of the analog VLSI of massively parallel systems is discussed in detail together with the capabilities and !imitations of VLSI technologies and the required research and developments. Analog parallel signal processing drives for the development of very com­ pact, high speed and low power circuits. An important technologicallimitation in the reduction of the size of circuits and the improvement of the speed and power consumption performance is the device inaccuracies or device mismatch.

CMOS Wireless Transceiver Design

by Jan Crols and Michiel Steyaert

Published 30 June 1997

The world of wireless communications is changing very rapidly since a few years. The introduction of digital data communication in combination with digital signal process­ ing has created the foundation for the development of many new wireless applications. High-quality digital wireless networks for voice communication with global and local coverage, like the GSM and DECT system, are only faint and early examples of the wide variety of wireless applications that will become available in the remainder of this decade. The new evolutions in wireless communications set new requirements for the trans­ ceivers (transmitter-receivers). Higher operating frequencies, a lower power consump­ tion and a very high degree of integration, are new specifications which ask for design approaches quite different from the classical RF design techniques. The integrata­ bility and power consumption reduction of the digital part will further improve with the continued downscaling of technologies. This is however completely different for the analog transceiver front-end, the part which performs the interfacing between the antenna and the digital signal processing. The analog front-end's integratability and power consumption are closely related to the physical limitations of the transceiver topology and not so much to the scaling of the used technology. Chapter 2 gives a detailed study of the level of integration in current transceiver realization and analyzes their limitations. In chapter 3 of this book the complex signal technique for the analysis and synthesis of multi-path receiver and transmitter topologies is introduced.

Distortion Analysis of Analog Integrated Circuits

by Piet Wambacq and Willy M.C. Sansen

Published 30 June 1998

The analysis and prediction of nonlinear behavior in electronic circuits has long been a topic of concern for analog circuit designers. The recent explosion of interest in portable electronics such as cellular telephones, cordless telephones and other applications has served to reinforce the importance of these issues. The need now often arises to predict and optimize the distortion performance of diverse electronic circuit configurations operating in the gigahertz frequency range, where nonlinear reactive effects often dominate. However, there have historically been few sources available from which design engineers could obtain information on analysis tech niques suitable for tackling these important problems. I am sure that the analog circuit design community will thus welcome this work by Dr. Wambacq and Professor Sansen as a major contribution to the analog circuit design literature in the area of distortion analysis of electronic circuits. I am personally looking forward to hav ing a copy readily available for reference when designing integrated circuits for communication systems.

Design of Low-Voltage Low-Power CMOS Delta-Sigma A/D Converters

by Vincenzo Peluso, Michiel Steyaert, and Willy M.C. Sansen

Published 28 February 1999

Design of Low-Voltage Low-Power CMOS Delta-Sigma A/D Converters investigates the feasibility of designing Delta-Sigma Analog to Digital Converters for very low supply voltage (lower than 1.5V) and low power operation in standard CMOS processes. The chosen technique of implementation is the Switched Opamp Technique which provides Switched Capacitor operation at low supply voltage without the need to apply voltage multipliers or low VtMOST devices.
A method of implementing the classic single loop and cascaded Delta-Sigma modulator topologies with half delay integrators is presented. Those topologies are studied in order to find the parameters that maximise the performance in terms of peak SNR. Based on a linear model, the performance degradations of higher order single loop and cascaded modulators, compared to a hypothetical ideal modulator, are quantified.
An overview of low voltage Switched Capacitor design techniques, such as the use of voltage multipliers, low VtMOST devices and the Switched Opamp Technique, is given. An in-depth discussion of the present status of the Switched Opamp Technique covers the single-ended Original Switched Opamp Technique, the Modified Switched Opamp Technique, which allows lower supply voltage operation, and differential implementation including common mode control techniques.
The restrictions imposed on the analog circuits by low supply voltage operation are investigated. Several low voltage circuit building blocks, some of which are new, are discussed. A new low voltage class AB OTA, especially suited for differential Switched Opamp applications, together with a common mode feedback amplifier and a comparator are presented and analyzed.
As part of a systematic top-down design approach, the non-ideal charge transfer of the Switched Opamp integrator cell is modeled, based upon several models of the main opamp non-ideal characteristics. Behavioral simulations carried out with these models yield the required opamp specifications that ensure that the intended performance is met in an implementation.
A power consumption analysis is performed. The influence of all design parameters, especially the low power supply voltage, is highlighted. Design guidelines towards low power operation are distilled.
Two implementations are presented together with measurement results. The first one is a single-ended implementation of a Delta-Sigma ADC operating with 1.5V supply voltage and consuming 100 W for a 74 dB dynamic range in a 3.4 kHz bandwidth. The second implementation is differential and operates with 900 mV. It achieves 77 dB dynamic range in 16 kHz bandwidth and consumes 40 W.
Design of Low-Voltage Low-Power CMOS Delta-Sigma A/D Converters is essential reading for analog design engineers and researchers.

Analog Layout Generation for Performance and Manufacturability

by Koen Lampaert, Georges Gielen, and Willy M.C. Sansen

Published 30 April 1999

Analog integrated circuits are very important as interfaces between the digital parts of integrated electronic systems and the outside world. A large portion of the effort involved in designing these circuits is spent in the layout phase. Whereas the physical design of digital circuits is automated to a large extent, the layout of analog circuits is still a manual, time-consuming and error-prone task. This is mainly due to the continuous nature of analog signals, which causes analog circuit performance to be very sensitive to layout parasitics. The parasitic elements associated with interconnect wires cause loading and coupling effects that degrade the frequency behaviour and the noise performance of analog circuits. Device mismatch and thermal effects put a fundamental limit on the achievable accuracy of circuits. For successful automation of analog layout, advanced place and route tools that can handle these critical parasitics are required.
In the past, automatic analog layout tools tried to optimize the layout without quantifying the performance degradation introduced by layout parasitics. Therefore, it was not guaranteed that the resulting layout met the specifications and one or more layout iterations could be needed. In Analog Layout Generation for Performance and Manufacturability, the authors propose a performance driven layout strategy to overcome this problem. In this methodology, the layout tools are driven by performance constraints, such that the final layout, with parasitic effects, still satisfies the specifications of the circuit. The performance degradation associated with an intermediate layout solution is evaluated at runtime using predetermined sensitivities. In contrast with other performance driven layout methodologies, the tools proposed in this book operate directly on the performance constraints, without an intermediate parasitic constraint generation step. This approach makes a complete and sensible trade-off between the different layout alternatives possible at runtime and therefore eliminates the possible feedback route between constraint derivation, placement and layout extraction.
Besides its influence on the performance, layout also has a profound impact on the yield and testability of an analog circuit. In Analog Layout Generation for Performance and Manufacturability, the authors outline a new criterion to quantify the detectability of a fault and combine this with a yield model to evaluate the testability of an integrated circuit layout. They then integrate this technique with their performance driven routing algorithm to produce layouts that have optimal manufacturability while still meeting their performance specifications.
Analog Layout Generation for Performance and Manufacturability will be of interest to analog engineers, researchers and students.

CMOS Cellular Receiver Front-Ends

by Johan Janssens and Michiel Steyaert

Published 1 January 2002

CMOS Cellular Receiver Front-Ends: from Specification to Realization deals with the design of the receive path of a highly-integrated CMOS cellular transceiver for the GSM-1800 cellular system. The complete design trajectory is covered, starting from the documents describing the standard down to the systematic development of CMOS receiver ICs that comply to the standard. The design of CMOS receivers is tackled at all abstraction levels: from architecture level, via circuit level, down to the device level, and the other way around.

The theoretical core of the book discusses the fundamental and more advanced aspects of RF CMOS design. It focuses specifically on all aspects of the design of high-performance CMOS low-noise amplifiers.

A Computer-Aided Design and Synthesis Environment for Analog Integrated Circuits

by Geert Van Der Plas, Georges Gielen, and Willy M.C. Sansen

Published 30 April 2002

This text addresses the design methodologies and CAD tools available for the systematic design and design automation of analogue integrated circuits. Two complementary approaches discussed increase analogue design productivity, demonstrated throughout using design times of the different design experiments undertaken.

CMOS Fractional-N Synthesizers

by Bram De Muer and Michiel Steyaert

Published 31 January 2003

CMOS Fractional-N Synthesizers starts with a comprehensive introduction to general frequency synthesis. Different architectures and synthesizer building blocks are discussed with their relative importance on synthesizer specifications. The process of synthesizer specification derivation is illustrated with the DCS-1800 standard as a general test case.

The book tackles the design of fractional-N synthesizers in CMOS on circuit level as well as system level. The circuit level focuses on high-speed prescaler design up to 12 GHz in CMOS and on fully integrated, low-phase-noise LC-VCO design. High-Q inductor integration and simulation in CMOS is elaborated and flicker noise minimization techniques are presented, ranging from bias point choice to noise filtering techniques.

On a higher level, a systematic design strategy has been developed that trades off all noise contributions and fast dynamics for integrated capacitance (area). Moreover, a theoretical DeltaSigma phase noise analysis is presented, extended with a fast non-linear analysis method to accurately predict the influence of PLL non-linearities on the spectral purity of the DeltaSigma fractional-N frequency synthesizers.

Systematic Design of Analog IP Blocks

by Jan Vandenbussche, Georges Gielen, and Michiel Steyaert

Published 31 May 2003

This book introduces a design methodology that can help to bridge the productivity gap. Two different types of designs, depending on the design challenge, have been identified. To validate the presented methodologies, the authors have selected and designed accordingly three different industrial-strength applications.

High Data Rate Transmitter Circuits

by C J De Ranter and Michiel Steyaert

Published 31 August 2003

This practical guide and introduction to the design of key RF building blocks used in high data rate transmitters emphasizes CMOS circuit techniques applicable to oscillators and upconvertors. The book is written in an easily accessible manner, without losing detail on the technical side.

Design and Analysis of High Efficiency Line Drivers for Xdsl

by Tim Piessens and Michiel Steyaert

Published 31 March 2004

Design and Analysis of High Efficiency Line Drivers for xDSL covers the most important building block of an xDSL (ADSL, VDSL, ...) system: the line driver. Traditional Class AB line drivers consume more than 70% of the total power budget of state-of-the-art ADSL modems. This book describes the main difficulties in designing line drivers for xDSL. The most important specifications are elaborated staring from the main properties of the channel and the signal properties. The traditional (class AB), state-of-the-art (class G) and future technologies (class K) are discussed.

The main part of Design and Analysis of High Efficiency Line Drivers for xDSL describes the design of a novel architecture: the Self-Oscillating Power Amplifier or SOPA.

Static and Dynamic Performance Limitations for High Speed D/A Converters

by Anne van den Bosch, Michiel Steyaert, and Willy M.C. Sansen

Published 29 February 2004

Static and Dynamic Performance Limitations for High Speed D/A Converters discusses the design and implementation of high speed current-steering CMOS digital-to-analog converters.
Starting from the definition of the basic specifications for a D/A converter, the elements determining the static and dynamic performance are identified. Different guidelines based on scientific derivations are suggested to optimize this performance. Furthermore, a new closed formula has been derived to account for the influence of the transistor mismatch on the achievable resolution of the current-steering D/A converter. To allow a thorough understanding of the dynamic behavior, a new factor has been introduced. Moreover, the frequency dependency of the output impedance introduces harmonic distortion components which can limit the maximum attainable spurious free dynamic range. Finally, the last part of the book gives an overview on different existing transistor mismatch models and the link with the static performance of the D/A converter.

Lna-Esd Co-Design for Fully Integrated CMOS Wireless Receivers

by Paul Leroux, Michiel Steyaert, and LeRoux Paul

Published 1 January 2005

LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers fits in the quest for complete CMOS integration of wireless receiver front-ends. With a combined discussion of both RF and ESD performance, it tackles one of the final obstacles on the road to CMOS integration. The book is conceived as a design guide for those actively involved in the design of CMOS wireless receivers.

The book starts with a comprehensive introduction to the performance requirements of low-noise amplifiers in wireless receivers. Several popular topologies are explained and compared with respect to future technology and frequency scaling. The ESD requirements are introduced and related to the state-of-the-art protection devices and circuits.

LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers provides an extensive theoretical treatment of the performance of CMOS low-noise amplifiers in the presence of ESD-protection circuitry. The influence of the ESD-protection parasitics on noise figure, gain, linearity, and matching are investigated. Several RF-ESD co-design solutions are discussed allowing both high RF-performance and good ESD-immunity for frequencies up to and beyond 5 GHz. Special attention is also paid to the layout of both active and passive components.

LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers offers the reader intuitive insight in the LNA's behavior, as well as the necessary mathematical background to optimize its performance. All material is experimentally verified with several CMOS implementations, among which a fully integrated GPS receiver front-end. The book is essential reading for RF design engineers and researchers in the field and is also suitable as a text book for an advanced course on the subject.

Matching Properties of Deep Sub-Micron Mos Transistors

by Jeroen A Croon, Willy Sansen, and Herman E Maes

Published 1 January 2005

Matching Properties of Deep Sub-Micron MOS Transistors examines this interesting phenomenon. Microscopic fluctuations cause stochastic parameter fluctuations that affect the accuracy of the MOSFET. For analog circuits this determines the trade-off between speed, power, accuracy and yield. Furthermore, due to the down-scaling of device dimensions, transistor mismatch has an increasing impact on digital circuits. The matching properties of MOSFETs are studied at several levels of abstraction:

A simple and physics-based model is presented that accurately describes the mismatch in the drain current. The model is illustrated by dimensioning the unit current cell of a current-steering D/A converter.

The most commonly used methods to extract the matching properties of a technology are bench-marked with respect to model accuracy, measurement accuracy and speed, and physical contents of the extracted parameters.

The physical origins of microscopic fluctuations and how they affect MOSFET operation are investigated. This leads to a refinement of the generally applied 1/area law. In addition, the analysis of simple transistor models highlights the physical mechanisms that dominate the fluctuations in the drain current and transconductance.

The impact of process parameters on the matching properties is discussed.

The impact of gate line-edge roughness is investigated, which is considered to be one of the roadblocks to the further down-scaling of the MOS transistor.

Matching Properties of Deep Sub-Micron MOS Transistors is aimed at device physicists, characterization engineers, technology designers, circuit designers, or anybody else interested in the stochastic properties of the MOSFET.

Design of Wireless Autonomous Datalogger ICS

by Wim Claes, Robert Puers, and Willy Sansen

Published 1 January 2005

Design of Wireless Autonomous Dataloggers IC's reveals the state of the art in the design of complex dataloggers, with a special focus on low power consumption. The emphasis is on autonomous dataloggers for stand-alone applications with remote reprogrammability.

The book starts with a comprehensive introduction on the most important design aspects and trade-offs for miniaturized low-power telemetric dataloggers. After the general introduction follows an in-depth case study of an autonomous CMOS datalogger IC for the registration of in vivo loads on oral implants. After tackling the design of the datalogger on the system level, the design of the different building blocks is elaborated in detail, with emphasis on low power.

A clear overview of the operation, the implementation, and the most important design considerations of the building blocks to achieve optimal system performance is given. Design of Wireless Autonomous Dataloggers IC's discusses the design of correlated double sampling amplifiers and sample-and-holds, binary-weighted current steering DACs, successive approximation ADCs and relaxation clock oscillators and can also be used as a manual for the design of these building blocks.

Design of Wireless Autonomous Dataloggers IC's covers the complete design flow of low-power miniaturized autonomous dataloggers with a bi-directional wireless link and on-board data processing, while providing detailed insight into the most critical design issues of the different building blocks. It will allow you to design complex dataloggers faster. It is essential reading for analog design engineers and researchers in the field of miniaturized dataloggers and is also suitable as a text for an advanced course on the subject.

Analog Design Essentials

by Willy Sansen

Published 1 January 2006

This unique book contains all topics of importance to the analog designer which are essential to obtain sufficient insights to do a thorough job. The book starts with elementary stages in building up operational amplifiers. The synthesis of opamps is covered in great detail. Many examples are included, operating at low supply voltages. Chapters on noise, distortion, filters, ADC/DACs and oscillators follow. These are all based on the extensive amount of teaching that the author has carried out world-wide.