Book 218

Design of Low-Voltage Bipolar Operational Amplifiers discusses the sub-circuits necessary to build a low-voltage operational amplifier. These include rail-to-rail input stages, rail-to-rail output stages, intermediate stages, protection circuitry and frequency compensation techniques. Of each of these, various implementations are examined. Furthermore, the book discusses realizations in silicon of the amplifiers.
The design and implementation of low-voltage bipolar Operational Amplifiers (OpAmps) is fully presented. A low supply voltage is necessary because the tendency towards chip components of smaller dimensions lowers the breakdown voltage of these components. Further, a low supply voltage is favorable because it enables operation of the OpAmp from just one single battery cell. The bipolar technology is chosen, because it is more suited for operation at low-voltages than the MOS technology.
The common-mode input voltage of the OpAmp must be able to have any value that fits within the supply voltage range. Input stages are discussed which are able to realize this at supply voltages down to 1.8 V, as well as down to 1 V.
The output voltage of the OpAmp must be able to have any value within the supply voltage range. One of the 1 V output stages that is discussed, the multi-path driven output stage, also has a high bandwidth with a high gain.
In addition to the input and output stage, the OpAmp comprises an intermediate stage, between the input stage and the output stage, to boost the overall gain of the OpAmp, and a class AB current control.
A frequency compensation technique is used to split apart the pole frequencies in the transfer function. A disadvantage of this nested Miller compensation, is that the resulting bandwidth is reduced by a factor of two. A new method, multi-path-driven Miller compensation, which does not have this drawback, is therefore introduced.
Several realizations are evaluated and a figure of merit is defined for the performance comparison of the OpAmps. One of the OpAmps operates at a 1 V supply, has a 3.4 MHz bandwidth with a 100 pF load and has a 700 A supply current.
The book is an excellent reference for professional designers of amplifiers and may be used as a text for advanced courses on the subject.

Book 313

Frequency Compensation Techniques for Low-Power Operational Amplifiers is intended for professional designers of integrated amplifiers, emphasizing low-voltage and low-power solutions.
The book bridges the gap between the professional designer's needs and available techniques for frequency compensation. It does so by explaining existing techniques and introducing several new techniques including Hybrid Nested Miller compensation, Multipath Miller Zero cancellation and Multipath Conditionally Stable compensation. All compensation techniques are treated in a stage-number-based order, progressing from a single transistor to circuits with six stages and more. Apart from discussing the mathematical basis of the compensation methods, the book provides the reader with the factual information that is required for practicing the design of integrated feedback amplifiers and many worked out examples. What is more, many bipolar and CMOS operational amplifier realizations, along with their measurement results, prove the effectiveness of the compensation techniques in real-life circuits.
The text focuses on low-voltage, low-power integrated amplifiers. Many of the presented bipolar circuits operate at supply voltages down to 1V, while several CMOS amplifiers that function correctly just slightly above this voltage are demonstrated. The lowest measured power consumption amounts to 17muW for a class AB CMOS opAmp with 120dB gain. Despite this attention to low voltage and low power, the frequency compensation strategies provided are universally applicable. The fundamental approach followed leads to efficient compensation strategies that are well guarded against the parameter variations inherent to the mass-fabrication of integrated circuits.
The book is essential reading for practicing analog design engineers and researchers in the field. It is also suitable as a text for an advanced course on the subject.

Book 374

Design of Low-Voltage, Low-Power CMOS Operational Amplifier Cells describes the theory and design of the circuit elements that are required to realize a low-voltage, low-power operational amplifier. These elements include constant-gm rail-to-rail input stages, class-AB rail-to-rail output stages and frequency compensation methods. Several examples of each of these circuit elements are investigated. Furthermore, the book illustrates several silicon realizations, giving their measurement results.
The text focuses on compact low-voltage low-power operational amplifiers with good performance. Six simple high-performance class-AB amplifiers are realized using a very compact topology making them particularly suitable for use as VLSI library cells. All of the designs can use a supply voltage as low as 3V. One of the amplifier designs dissipates only 50µW with a unity gain frequency of 1.5 MHz. A second set of amplifiers run on a supply voltage slightly above 1V. The amplifiers combine a low power consumption with a gain of 120 dB. In addition, the design of three fully differential operational amplifiers is addressed.
Design of Low-Voltage, Low-Power CMOS Operational Amplifier Cells is intended for professional designers of analog circuits. It is also suitable for use as a text book for an advanced course in CMOS operational amplifier design.

Book 419

1 1. 1 Introduction The (signal processing and storage) capacity ofthe human brain enables us to become powerful autonomous beings, but only if our brains operate in conjunction with (at least some of) our senses and muscles. Using these organs, we can interact with our environment, learn to adapt, and improve important aspects of our life. Similarly, the signal processing capabilities of modern electronics (computers) could be combined with electronic sensors and actuators to enable interaction with, and adaptation to, the (non-electrical) environment. This willlead to smarter and more powerful automated tools and machines. To facilitate and stimulate such a development, easy-to-use low-cost sensors are needed. The combination of electronic interface functions and a sensor in an integrated smart sensor, that provides a standard, digital, and bus-compatible output, would simplify the connection of sensors to standard electronic signal processors (microcontrollers, computers, etc. ). Currently, the calibration procedure, required for standardization of the sensor output signal level, contributes largely to the production costs of accurate sensors. To enable automation of the calibration procedure, and hence reduce the sensor fabrication costs, a digital calibrationjunction should be included in the smart sensor. INTEGRATED SMART SENSORS: Design and Calibration Introduction 1. 2 Sensors and actuators In industry many processes are electronically controlled. As depicted in Fig.

Book 520

Compact Low-Voltage and High-Speed CMOS, BiCMOS and Bipolar Operational Amplifiers discusses the design of integrated operational amplifiers that approach the limits of low supply voltage or very high bandwidth. The resulting realizations span the whole field of applications from micro-power CMOS VLSI amplifiers to 1-GHz bipolar amplifiers.
The book presents efficient circuit topologies in order to combine high performance with simple solutions. In total twelve amplifier realizations are discussed. Two bipolar amplifiers are discussed, a 1-GHz operational amplifier and an amplifier with a high ratio between the maximum output current and the quiescent current. Five amplifiers have been designed in CMOS technology, extremely compact circuits that can operate on supply voltages down to one gate-source voltage and two saturation voltages which equals about 1.4 V and, ultimate-low-voltage amplifiers that can operate on supply voltages down to one gate-source voltage and one saturation voltage which amounts to about 1.2 V. In BiCMOS technology five amplifiers have been designed. The first two amplifiers are based on a compact topology. Two other amplifiers are designed to operate on low supply voltages down to 1.3 V. The final amplifier has a unity-gain frequency of 200 MHz and can operate down to 2.5 V.
Compact Low-Voltage and High-Speed CMOS, BiCMOS and Bipolar Operational Amplifiers is intended for the professional analog designer. Also, it is suitable as a text book for advanced courses in amplifier design.

Book 595

This book describes the theory and design of high-accuracy CMOS smart temperature sensors. The major topic of the work is the realization of a smart temperature sensor that has an accuracy that is so high that it can be applied without any form of calibration. Integrated in a low-cost CMOS technology, this yields at the publication date of this book one of the most inexpensive intelligent general purpose temperature sensors in the world. The first thermometers could only be read by the human eye. The industrial revolution and the following computerization asked for more intelligent sensors, which could easily communicate to digital computers. This led to· the development of integrated temperature sensors that combine a bipolar temperature sensor and an A-to-D converter on the same chip. The implementation in CMOS technology reduces the processing costs to a minimum while having the best-suited technology to increase the (digital) intelligence. The accuracy of conventional CMOS smart temperature sensors is degraded by the offset of the read-out electronics. Calibration of these errors is quite expensive, however, dynamic offset-cancellation techniques can reduce the offset of amplifiers by a factor 100 to 1000 and do not need trimming. Chapter two gives an elaborate description of the different kinds of dynamic offset-cancellation techniques. Also a new technique is introduced called the nested chopper technique. An implementation of a CMOS nested-chopper instrumentation amplifier shows a residual offset of less than lOOn V, which is the best result reported to date.

Book 768

Systematic Design of Sigma-Delta Analog-to-Digital Converters describes the issues related to the sigma-delta analog-to-digital converters (ADCs) design in a systematic manner: from the top level of abstraction represented by the filters defining signal and noise transfer functions (STF, NTF), passing through the architecture level where topology-related performance is calculated and simulated, and finally down to parameters of circuit elements like resistors, capacitors, and amplifier transconductances used in individual integrators. The systematic approach allows the evaluation of different loop filters (order, aggressiveness, discrete-time or continuous-time implementation) with quantizers varying in resolution. Topologies explored range from simple single loops to multiple cascaded loops with complex structures including more feedbacks and feedforwards. For differential circuits, with switched-capacitor integrators for discrete-time (DT) loop filters and active-RC for continuous-time (CT) ones, the passive integrator components are calculated and the power consumption is estimated, based on top-level requirements like harmonic distortion and noise budget.
This unified, systematic approach to choosing the best sigma-delta ADC implementation for a given design target yields an interesting solution for a high-resolution, broadband (DSL-like) ADC operated at low oversampling ratio, which is detailed down to transistor-level schematics.
The target audience of Systematic Design of Sigma-Delta Analog-to-Digital Converters are engineers designing sigma-delta ADCs and/or switched-capacitor and continuous-time filters, both beginners and experienced. It is also intended for students/academics involved in sigma-delta and analog CAD research.