This book provides practical solutions for delay and power reduction for on-chip interconnects and buses. It provides an in depth description of the problem of signal delay and extra power consumption, possible solutions for delay and glitch removal, while considering the power reduction of the total system. Coverage focuses on use of the Schmitt Trigger as an alternative approach to buffer insertion for delay and power reduction in VLSI interconnects. In the last section of the book, various bus coding techniques are discussed to minimize delay and power in address and data buses.
- ISBN13 9781493942947
- Publish Date 9 October 2016 (first published 15 June 2015)
- Publish Status Active
- Publish Country US
- Imprint Springer-Verlag New York Inc.
- Edition Softcover reprint of the original 1st ed. 2015
- Format Paperback
- Pages 152
- Language English