Verilog Coding for Logic Synthesis

by Lee

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This book provides a practical approach to Verilog design and problem solving. The bulk of the book deals with practical design problems that design engineers solve on a daily basis. It includes over 90 design examples. There are 3 full scale design examples that include specification, architectural definition, micro-architectural definition, RTL coding, testbench coding and verification. The book is suitable for use as a textbook in EE departments that have VLSI courses.
  • ISBN10 0471457566
  • ISBN13 9780471457565
  • Publish Date 1 February 2005
  • Publish Status Active
  • Publish Country US
  • Imprint John Wiley & Sons Inc
  • Language English