For many years, most computer architects have pursued one primary goal: performance. Architects have translated the ever-increasing abundance of ever-faster transistors provided by Moore's law into remarkable increases in performance. Recently, however, the bounty provided by Moore's law has been accompanied by several challenges that have arisen as devices have become smaller, including a decrease in dependability due to physical faults. In this book, we focus on the dependability challenge and the fault tolerance solutions that architects are developing to overcome it. The two main purposes of this book are to explore the key ideas in fault-tolerant computer architecture and to present the current state-of-the-art - over approximately the past 10 years - in academia and industry.
- ISBN13 9781598299533
- Publish Date 30 May 2009 (first published 17 May 2009)
- Publish Status Active
- Publish Country US
- Imprint Morgan & Claypool Publishers
- Format Paperback
- Pages 104
- Language English