This is a revised edition of a standard text, which presents the language through examples illustrating the important styles of representation, including: structural models, behavioural models of combinational and sequential circuits for logic synthesis, FSM-datapath models, and cycle-accurate descriptions. A chapter on behavioural synthesis presents the use of cycle-accurate descriptions with these tools. This text can be used as a useful resource for engineers and students interested in describing, simulating, and synthesizing digital systems. The order of coverage of representation styles matches typical introductory courses (structural, synthesizable, FSM-datapath, cycle-accurate). An appendix with a tutorial workbook style is keyed into the introduction. For architecture courses, modelling of simple pipelined processors is presented. The pack includes a CD-ROM containing the VeriwellTM Verilog simulator, the Synplicity TM Synplify TM FPGA synthesis software, examples from the book in text and PDF format, and lecture slides in PDF format. Usage of the synthesis tool is time-limited; directions for obtaining an extended licence are provided.
The simulator and synthesis tools are available for several platforms.
- ISBN10 0792397231
- ISBN13 9780792397236
- Publish Date 31 May 1996
- Publish Status Out of Print
- Out of Print 12 September 2013
- Publish Country US
- Publisher Springer
- Imprint Kluwer Academic Publishers
- Edition 3rd edition
- Format Hardcover
- Pages 336
- Language English