Creating Assertion-Based IP (Integrated Circuits and Systems) (Series on Integrated Circuits and Systems) (Lecture Notes in Computer Science, #59)

by Harry D. Foster and Adam C. Krolnik

This book presents formal testplanning guidelines with examples focused on creating assertion-based verification IP. It demonstrates a systematic process for formal specification and formal testplanning, and also demonstrates effective use of assertions languages beyond the traditional language construct discussions

Note that there many books published on assertion languages (such as SystemVerilog assertions and PSL). Yet, none of them discuss the important process of testplanning and using these languages to create verification IP. This is the first book published on this subject.

• ISBN13: 9780387366418
• Publish Date: 26 November 2007
• Publish Status: Active
• Publish Country: US
• Imprint: Springer-Verlag New York Inc.
• Edition: 2008 ed.
• Format: Hardcover
• Pages: 318
• Language: English