This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how a NoC can be designed and optimized. Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.
- ISBN13 9781461494041
- Publish Date 14 November 2013
- Publish Status Active
- Publish Country US
- Imprint Springer-Verlag New York Inc.
- Edition 2014 ed.
- Format Hardcover
- Pages 143
- Language English