Offset Reduction Techniques in High-Speed Analog-to-Digital Converters analyzes, describes the design, and presents test results of Analog-to-Digital Converters (ADCs) employing the three main high-speed architectures: flash, two-step flash and folding and interpolation. The advantages and limitations of each one are reviewed, and the techniques employed to improve their performance are discussed.
- ISBN13 9789048181926
- Publish Date 28 October 2010 (first published 1 January 2009)
- Publish Status Active
- Publish Country NL
- Imprint Springer
- Edition Softcover reprint of hardcover 1st ed. 2009
- Format Paperback
- Pages 382
- Language English