This is the first volume in a new hardcover combined volume of Synthesis Lectures. This volume contains the following lectures: Finite State Machine Datapath Design, Optimization, and Implementation; Introduction to Logic Synthesis using Verilog HDL; High-Speed Digital System Design; Microcontrollers Fundamentals for Engineers and Scientists
- ISBN10 1608453103
- ISBN13 9781608453108
- Publish Date 15 October 2010 (first published 15 July 2010)
- Publish Status Active
- Publish Country US
- Imprint Morgan & Claypool Publishers
- Format Hardcover
- Pages 438
- Language English