Systolic algorithm design exploits the area at the interface between algorithms and computer architecture. It allows problem structure to determine machine structure, generating algorithmically specialized arrays which employ massive parallelism, high throughput and regular interconnection topologies. This collection of specially commissioned chapters is written by international experts. It draws together the main strands of research in the design of systolic algorithms, explaining the state-of-the-art in formal methods, manipulation methods and design tools. The intention is to provide readers with techniques and methodologies which allow them to adopt a formal approach to the design process. This book should be of interest to graduate students, professionals and researchers working in hardware design in industry and academic institutions.