Synthesis Lectures on Digital Circuits and Systems
2 total works
Finite State Machine Datapath Design, Optimization, and Implementation
by Justin Davis and Robert Reese
Published 1 June 2007
Finite State Machine Datapath Design, Optimization, and Implementation explores the design space of combined FSM/Datapath implementations. The lecture starts by examining performance issues in digital systems such as clock skew and its effect on setup and hold time constraints, and the use of pipelining for increasing system clock frequency. This is followed by definitions for latency and throughput, with associated resource tradeoffs explored in detail through the use of dataflow graphs and scheduling tables applied to examples taken from digital signal processing applications. Also, design issues relating to functionality, interfacing, and performance for different types of memories commonly found in ASICs and FPGAs such as FIFOs, single-ports, and dual-ports are examined. Selected design examples are presented in implementation-neutral Verilog code and block diagrams, with associated design files available as downloads for both Altera Quartus and Xilinx Virtex FPGA platforms. A working knowledge of Verilog, logic synthesis, and basic digital design techniques is required. This lecture is suitable as a companion to the synthesis lecture titled Introduction to Logic Synthesis using Verilog HDL.
High-Speed Digital System Design bridges the gap from theory to implementation in the real world. Systems with clock speeds in low megahertz range qualify for high-speed. Proper design results in quality digital transmissions and lowers the chance for errors. This book is for computer and electrical engineers who may or may not have learned electromagnetic theory. The presentation style allows readers to quickly begin designing their own high-speed systems and diagnosing existing designs for errors. After studying this book, readers will be able to: Design the power distribution system for a printed circuit board to minimize noise; Plan the layers of a PCB for signals, power, and ground to maximize signal quality and minimize noise; Include test structures in the printed circuit board to easily diagnose manufacturing mistakes; Choose the best PCB design parameters such a trace width, height,and routed path to ensure the most stable characteristic impedance; Determine the correct termination to minimize reflections; Predict the delay caused by a given PCB trace; Minimize driver power consumption using AC terminations; Compensate for discontinuities along a PCB trace; Use pre-emphasis and equalization techniques to counteract lossy transmission lines; Determine the amount of crosstalk between two traces; Diagnose existing PCBs to determine the sources of errors.