Book 3

This book describes innovative techniques and the theoretical background for design and analysis of high performance RF/Microwave transmitters. It introduces new, robust linearization/efficiency enhancement techniques, applicable to all of the switched mode power amplifiers. Novel analysis methods associated with these new techniques are also introduced and supporting measurement results are documented. Innovative graphical representation methods are used to help the reader understand the matter intuitively. Applications for the techniques discussed are very extensive, ranging from data convertors to RF/Microwave/mm-wave wireless/wire line transmitters. The authors have avoided using lengthy formulas in the discussion and have used an intuitive and simple approach to go through the necessary details. Readers will gain valuable understanding of the dither phenomenon, its mechanism, effect and undesired side effects. The novel architectures introduced are simple, don't require complicated DSP techniques and are easy to implement.


This book addresses the challenges of designing high performance analog-to-digital converters (ADCs) based on the "smart data converters" concept, which implies context awareness, on-chip intelligence and adaptation. Readers will learn to exploit various information either a-priori or a-posteriori (obtained from devices, signals, applications or the ambient situations, etc.) for circuit and architecture optimization during the design phase or adaptation during operation, to enhance data converters performance, flexibility, robustness and power-efficiency. The authors focus on exploiting the a-priori knowledge of the system/application to develop enhancement techniques for ADCs, with particular emphasis on improving the power efficiency of high-speed and high-resolution ADCs for broadband multi-carrier systems.


This book investigates solutions, benefits, limitations, and costs associated with multi-standard operation of RF front-ends and their ability to adapt to variable radio environments. Next, it highlights the optimization of RF front-ends to allow maximum performance within a certain power budget, while targeting full integration. Finally, the book investigates possibilities for low-voltage, low-power circuit topologies in CMOS technology.


Sigma Delta converters are a very popular choice for the A/D converter in multi-standard, mobile and cellular receivers. Key A/D converter specifications are high dynamic range, robustness, scalability, low-power and low EMI. Robust Sigma Delta Converters presents a requirement derivation of a Sigma Delta modulator applied in a receiver for cellular and connectivity, and shows trade-offs between RF and ADC. The book proposes to categorize these requirements in 5 quality indicators which can be used to qualify a system, namely accuracy, robustness, flexibility, efficiency and emission. In the book these quality indicators are used to categorize Sigma Delta converter theory. A few highlights on each of these quality indicators are;

  • Quality indicators: provide a means to quantify system quality.
  • Accuracy: introduction of new Sigma Delta Modulator architectures.
  • Robustness: a significant extension on clock jitter theory based on phase and error amplitude error models. Extension of the theory describing aliasing in Sigma Delta converters for different types of DACs in the feedback loop.
  • Flexibility: introduction of a Sigma Delta converter bandwidth scaling theory leading to very flexible Sigma Delta converters.
  • Efficiency: introduction of new Figure-of-Merits which better reflect performance-power trade-offs.
  • Emission: analysis of Sigma Delta modulators on emission is not part of the book

The quality indicators also reveal that, to exploit nowadays advanced IC technologies, things should be done as much as possible digital up to a limit where system optimization allows reducing system margins. At the end of the book Sigma Delta converter implementations are shown which are digitized on application-, architecture-, circuit- and layout-level.

Robust Sigma Delta Converters is written under the assumption that the reader has some background in receivers and in A/D conversion.


This book proposes alternative switched capacitor techniques which allow the achievement of higher intrinsic analogue functional accuracy than previously possible in such application areas as analogue filter and ADC design. The validity of the concepts developed and analyzed in Switched-Capacitor Techniques for High-Accuracy Filter and ADC Design has been demonstrated in practice with the design of CMOS SC bandpass filters and algorithmic ADC stages.


Wireless sensor networks have the potential to become the third wireless revolution after wireless voice networks in the 80s and wireless data networks in the late 90s. Unfortunately, radio power consumption is still a major bottleneck to the wide adoption of this technology. Different directions have been explored to minimize the radio consumption, but the major drawback of the proposed solutions is a reduced wireless link robustness.

The primary goal of Architectures and Synthesizers for Ultra-low Power Fast Frequency-Hopping WSN Radios is to discuss, in detail, existing and new architectural and circuit level solutions for ultra-low power, robust, uni-directional and bi-directional radio links.

Architectures and Synthesizers for Ultra-low Power Fast Frequency-Hopping WSN Radios guides the reader through the many system, circuit and technology trade-offs he will be facing in the design of communication systems for wireless sensor networks. Finally, this book, through different examples realized in both advanced CMOS and bipolar technologies opens a new path in the radio design, showing how radio link robustness can be guaranteed by techniques that were previously exclusively used in radio systems for middle or high end applications like Bluetooth and military communications while still minimizing the overall system power consumption.


Integrated 60GHz RF Beamforming in CMOS describes new concepts and design techniques that can be used for 60GHz phased array systems. First, general trends and challenges in low-cost high data-rate 60GHz wireless system are studied, and the phased array technique is introduced to improve the system performance. Second, the system requirements of phase shifters are analyzed, and different phased array architectures are compared. Third, the design and implementation of 60GHz passive and active phase shifters in a CMOS technology are presented. Fourth, the integration of 60GHz phase shifters with other key building blocks such as low noise amplifiers and power amplifiers are described in detail. Finally, this book describes the integration of a 60GHz CMOS amplifier and an antenna in a printed circuit-board (PCB) package.


The history of the application of semiconductors for controlling currents goes back all the way to 1926, in which Julius Lilienfeld led a patent for a "Method and apparatus for controlling electric currents" [1], which is considered the rst work on metal/semiconductor eld-effect transistors. More well-known is the work of William Shockley, John Bardeen and Walter Brattain in the 1940s [2, 3], after which the development of semiconductor devices commenced. In 1958, independent work from Jack Kilby and Robert Noyce ledto the invention of integrated circuits. A few milestones in IC design are the rst monolithic operational ampli er in 1963 (Fairchild?A702, Bob Widlar) and the rst o- chip 4-bit microprocessor in 1971 (Intel 4004). Ever since the start of the semiconductor history, integration plays an imp- tant role: starting from single devices, ICs with basic functions were developed (e. g. opamps, logic gates), followed by ICs that integrate larger parts of a s- tem (e. g. microprocessors, radio tuners, audio ampli ers). Following this trend of system integration, this eventually leads to the integration of analog and d- ital components in one chip, resulting in mixed-signal ICs: digital components are required because signal processing is preferably done in the digital - main; analog components are required because physical signals are analog by nature. Mixed-signal ICs are already widespread in many applications (e. g. - dio, video); for the future, it is expected that this trend will continue, leading to a larger scale of integration.

Smart and Flexible Digital-to-Analog Converters proposes new concepts and implementations for flexibility and self-correction of current-steering digital-to-analog converters (DACs) which allow the attainment of a wide range of functional and performance specifications, with a much reduced dependence on the fabrication process.

DAC linearity is analysed with respect to the accuracy of the DAC unit elements. A classification is proposed of the many different current-steering DAC correction methods. The classification reveals methods that do not yet exist in the open literature. Further, this book systematically analyses self-calibration correction methods for the various DAC mismatch errors. For instance, efficient calibration of DAC binary currents is identified as an important missing method.

This book goes on to propose a new methodology for correcting mismatch errors of both nominally identical unary as well as scaled binary DAC currents. A new concept for DAC flexibility is presented. The associated architecture is based on a modular design approach that uses parallel sub-DAC units to realize flexible design, functionality and performance.

Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties.

DAC linearity is analysed with respect to the accuracy of the DAC unit elements. A classification is proposed of the many different current-steering DAC correction methods. The classification reveals methods that do not yet exist in the open literature. Further, this book systematically analyses self-calibration correction methods for the various DAC mismatch errors. For instance, efficient calibration of DAC binary currents is identified as an important missing method.

This book goes on to propose a new methodology for correcting mismatch errors of both nominally identical unary as well as scaled binary DAC currents. A new concept for DAC flexibility is presented. The associated architecture is based on a modular design approach that uses parallel sub-DAC units to realize flexible design, functionality and performance.

Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties.

This book goes on to propose a new methodology for correcting mismatch errors of both nominally identical unary as well as scaled binary DAC currents. A new concept for DAC flexibility is presented. The associated architecture is based on a modular design approach that uses parallel sub-DAC units to realize flexible design, functionality and performance.

Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties.

Two main concepts, self-calibration and flexibility, are demonstrated in practice using three DAC testchips in 250nm, 180nm and 40nm standard CMOS. Smart and Flexible Digital-to-Analog Converters will be useful to both advanced professionals and newcomers in the field. Advanced professionals will find new methods that are fully elaborated from analysis at conceptual level to measurement results at test-chip level. New comers in the field will find structured knowledge of fully referenced state-of-the art methods with many fully explained novelties.


This book describes the PREMISS system, which enables readers to overcome the limitations of state-of-the-art battery-less wireless sensors in size, cost, robustness and range, with a system concept for a 60 GHz wireless sensor system with monolithic sensors. The authors demonstrate a system in which the wireless sensors consist of wireless power receiving, sensing and communication functions in a single chip, without external components, avoiding costly IC-interfaces that are sensitive to mechanical and thermal stress.