Low Power and Process Variation Aware SRAM and Cache Design

by Avesta Sasan, Fadi Kurdahi, and Ahmed Eltawil

0 ratings • 0 reviews • 0 shelved
Book cover for Low Power and Process Variation Aware SRAM and Cache Design

Bookhype may earn a small commission from qualifying purchases. Full disclosure.

This book addresses process variability and power management for embedded memories, which are becoming dominant components in today's Systems on Chip (SoCs). It provides thorough background on voltage scaling and the reliability effects on memories, while describing memory behavior at different voltages and frequencies. The authors describe a cross-layer approach, simultaneously targeting the manufacturing of devices, the inner-design of the memory circuits, as well as the way they are architected into a system. This approach enables the design of reliable, power-efficient systems in which memories are dominating area, power, and performance.
  • ISBN10 146142271X
  • ISBN13 9781461422716
  • Publish Date 1 December 2015
  • Publish Status Active
  • Publish Country US
  • Imprint Springer-Verlag New York Inc.
  • Edition 2015 ed.
  • Format Hardcover
  • Pages 200
  • Language English