In recent years, both Networks-on-Chip, as an architectural solution for high-speed interconnect, and power consumption, as a key design constraint, have continued to gain interest in the design and research communities. This book offers a single-source reference to some of the most important design techniques proposed in the context of low-power design for networks-on-chip architectures.
- ISBN13 9781441969101
- Publish Date 6 October 2010 (first published 26 September 2010)
- Publish Status Active
- Publish Country US
- Imprint Springer-Verlag New York Inc.
- Format Hardcover
- Pages 287
- Language English