This book introduces low-noise and low-power design techniques for phase-locked loops and their building blocks. It summarizes the noise reduction techniques for fractional-N PLL design and introduces a novel capacitive-quadrature coupling technique for multi-phase signal generation. The capacitive-coupling technique has been validated through silicon implementation and can provide low phase-noise and accurate I-Q phase matching, with low power consumption from a super low supply voltage. Readers will be enabled to pick one of the most suitable QVCO circuit structures for their own designs, without additional effort to look for the optimal circuit structure and device parameters.
- ISBN13 9783319343709
- Publish Date 23 August 2016
- Publish Status Active
- Publish Country CH
- Imprint Springer International Publishing AG
- Edition Softcover reprint of the original 1st ed. 2015
- Format Paperback
- Pages 96
- Language English