High-Speed Clock Network Design is a collection of design concepts, techniques and research works from the author for clock distribution in microprocessors and high-performance chips. It is organized in 11 chapters.
- ISBN10 1475737068
- ISBN13 9781475737066
- Publish Date 15 January 2014 (first published 31 December 2002)
- Publish Status Withdrawn
- Out of Print 18 October 2014
- Publish Country US
- Imprint Springer
- Format Paperback (US Trade)
- Pages 196
- Language English